
Sr Software Engineer
SpaceX · Full-time
Oct 2021 - Present
• 3 yrs 7 mos• Increased Starlink Ka/E backhaul spectral efficiency from 55% to 85%
• Designed simple, light-weight and software-based flow control mechanism for Starlink Ka/E backhaul links
• Implemented efficient back-trace logging mechanism that resulted in crash-free MAC layer! and accelerated development time
• Enhanced user online experience by monitoring link quality and switching links upon certain triggers
Skills: C++ · Network Design · Object Oriented Design · Wireless Networking · Software Design · Python (Programming Language) · Networking · 3GPP · C

Sr Software Engineer
Microsoft · Full-time
Oct 2019 - Oct 2021
• 2 yrs 1 mo• Lead the design of Azure dual ToR project and architected near realtime link manager (granted Microsoft Patent Award [1])
• Lead design of DHCP for Azure dual ToR project and design of DHCPv6 for Azure networking
• Re-architected SONiC ConFiG GENerator to reduce overall OS fast boot up time from 52sec to 25sec
• Lead design of flexible and reservation based system for SONiC test lab/environment
• Designed and implemented simple DHCP monitoring utility
Skills: Object Oriented Design · Embedded Linux · Git · Python (Programming Language) · Networking
GitHub - Azure/sonic-linkmgrd: Repo For SONiC Buildimage Supporting Gemini ToRs

Sr Software Engineer
Mentor Graphics
Nov 2018 - May 2019
• 7 mos • Envisioned and put "Modular Compilation" feature on Veloce neXt roadmap (spans a number of years) that would considerably reduce compile time required for signal state recovery (SSR) and reconstruction (RECON)
• Designed an efficient algorithm for tree based minimization of module hierarchical name utilizing [regular] expressions
• Designed and implemented hierarchical UID/Symbol extraction using O(log n) tree based regular expressions, reduction from current O(n Log n) algorithm
• Designed and implemented interdependent task scheduler for CCV SSR/RECON tasks
Skills: Git

Sr Software Engineer
SpaceX
Dec 2017 - Nov 2018
• 1 yr• Designed and implemented Satellite/Gateway Attach/Detach Procedure
• Unblocked on target integration with design of efficient and robust utilities to pack bits (mem-aligned memory access with caching)
• Enhanced memory buffer pool allocation/de-allocation
• Enhanced existing light weight logger and added support for logging arbitrary messages
• Led design of testing framework [C++ STL] enhancements for different protocol stack state machines.
Skills: Embedded Linux · Git · Real-Time Operating Systems (RTOS) · Python (Programming Language) · Networking

Embedded Software Engineer
Amazon Web Services
Jul 2015 - Nov 2017
• 2 yrs 5 mos • Designed and implemented S3 bandwidth enhancements that enabled user to utilize up to 5x of existing bandwidth
• Designed and implemented control plane, live upgrade/downgrade, and target memory support for limiter pack feature
• Designed and implemented communication and control channels between PP- and ENA-cores
• Extended existing configuration framework to provide configuration for new ENA dongle
• Ported Cavium thermal driver to Simple Executive standalone application (SE)
• Enhanced Cavium dongle robustness by enabling per-core hardware-based watchdog timer interrupts
• Designed and implemented mailbox interrupt handler for synchronous crash/assert of the Cavium-based dongle
• Extended build system with support for Coverity static analysis tool
• Worked on several new instance type launches; K2, R4, and I3 instance types
Skills: Embedded Linux · Git · Real-Time Operating Systems (RTOS) · Python (Programming Language) · Networking
EC2 Networking / ELB Hackathon Winner
Announcing Network Performance Improvements for Amazon EC2 Instances

Embedded Software Engineer
Microsoft
Nov 2013 - Jul 2015
• 1 yr 9 mos • Designed and Extended UMDF NFC driver support to Host-Card Emulation on NXP PN547, QC QCA1990
• Early identified interoperability issues between Microsoft devices and different NFC readers
• Designed Device Test Application (DTA) driver extensions conforming with requirements of NFC forum DTA spec 2.1.01
• Extended HLK with HCE test coverage and helped with overall NFC HLK deployment
• Incorporated early integration concepts and helped bring up NFC HCE feature after initial implementation iteration
• Designed and implemented extensible PC/SC Win APIs framework that supports raw access to NFC devices
Skills: Object Oriented Design · Networking
CodePlex Archive

Embedded Software Engineer
RIM
Jan 2011 - Sep 2013
• 2 yrs 9 mos • Looked after performance metrics and recommended out-of-band data enhancements for LTE RAT control latency
• Provided differential analysis of RIM device vs. competitions, recommended solutions that bridged gaps in data throughput
• Enhanced code quality by eliminating static analysis warnings and isolating RIM’s from Qualcomm’s code bases
• Tight-coupled RIM and Qualcomm socket infrastructures for better TCP/UDP performance
• Performed RCA of several integration issues with different carriers across the globe
• Designed and integrated 3GPP PS Domain Specific Access Control (DSAC) into RIM Data call procedure
• Initiated technical discussion about design for test-ability and simulation among various stakeholders
• Helped bringing up data call on new platform board at Qualcomm facilities in San Diego
Skills: Embedded Linux · Networking

Software Engineer
Bloomberg
Jan 2010 - Dec 2010
• 1 yr • Incorporated new provisioning service alongside legacy provisioning service using automated verification
• Designed and implemented forwarding service of financial blotter feeds
• Extended FIX drop copy service to avoid duplicates of executions reports
• Designed migration framework to migrate brokers to new OMS/EMS infrastructure
Skills: Object Oriented Design

Nortel Networks
2006 - Sep 2009
Embedded Software Engineer
Feb 2006 - Sep 2009
• 3 yrs 8 mos • Designed robust and efficient LTE status PDU codec based on underlying hardware architecture cache-line length
• Devised and implemented a transparent transition from 67% CPU utilization architecture to an enhanced 52% CPU utilization architecture
• Proposed and implemented load balancing scheme across TTIs based on co-operative scheduling techniques
• Envisioned and implemented efficient and virtual-clock-based simulator tool [3] for complex UE/eNB interactions
• Completed MAC/RLC integration activity in time with the help of the new innovative simulator tool
• Adapted and enhanced a CPU light-weight logger framework for fast path logging mechanism
• Devised an efficient versioning strategy that fitted existing software with little programming overhead
• Presented and implemented an architecturally-sound solution to resource counts and licensing
• Absorbed H.248 (MEGACO) standard and implemented CODEC for the newly defined interface
• Recognized for the active participation in debugging and singling out system-wide integration issue
• Learnt Dual Logic Software Protection (DLSP) for PP15K application and enhanced card recoverability
• Modified base-level software and introduced software watchdog
• Implemented data statistics and collection framework among different PP15K shelves/cards
• High code quality, timely investigation/support, strong designer and performance coder
Skills: Object Oriented Design · Embedded Linux · Real-Time Operating Systems (RTOS) · Networking
Test scenario simulator
Embedded software developer
2006 - Sep 2009
• 3 yrs 9 mos • Designed robust and efficient LTE status PDU codec based on underlying hardware architecture cache-line length
• Devised and implemented a transparent transition from 67% CPU utilization architecture to an enhanced 52% CPU utilization architecture
• Proposed and implemented load balancing scheme across TTIs based on co-operative scheduling techniques
• Envisioned and implemented efficient and virtual-clock-based simulator tool [3] for complex UE/eNB interactions
• Completed MAC/RLC integration activity in time with the help of the new innovative simulator tool
• Adapted and enhanced a CPU light-weight logger framework for fast path logging mechanism
• Devised an efficient versioning strategy that fitted existing software with little programming overhead
• Presented and implemented an architecturally-sound solution to resource counts and licensing
• Absorbed H.248 (MEGACO) standard and implemented CODEC for the newly defined interface
• Recognized for the active participation in debugging and singling out system-wide integration issue
• Learnt Dual Logic Software Protection (DLSP) for PP15K application and enhanced card recoverability
• Modified base-level software and introduced software watchdog
• Implemented data statistics and collection framework among different PP15K shelves/cards
• High code quality, timely investigation/support, strong designer and performance coder
Skills: Embedded Linux · Real-Time Operating Systems (RTOS) · Networking
Test scenario simulator

Research Assistant
University of Ottawa
Jan 2004 - Apr 2005
• 1 yr 4 mosSkills: Real-Time Operating Systems (RTOS)

Research Assistant
Faculty of Enginnering, Alexandria University
Jun 1997 - Jul 2002
• 5 yrs 2 mos