Maybe it's time to edit this after 5 yrs and add some details... or not. Winner of EDN's Test Engineer of the Year

* Key member of IC Design IP Architecture Team specializing in jitter and signal conditioning (FFE, DFE, CTLE, etc.) * In-house expert specializing in Signal Integrity, Power Integrity, and Jitter in high-speed SERDES analog I/O interfaces (PCIe, XAUI, CEI, DDR, Fibre Channel, GigE) * Key member in the development of industry's first optical FPGA * R&D of advanced design architectures for optimizing signal integrity, power integrity, and jitter performance at ultr-high data rates * Expert in advanced Test & Measurement methodologies ranging from manufacturing, standards compliance, design validation, performance-limit characterization, and system-level Signal/Power Integrity * Defined Best Known Practices in Test & Measurement across all engineering organizations * Technical liason to Tier 1 customers of high-speed transceiver products Sneak Peek: Industry's First 28-Gbps FPGA Optimizing 10-Gbps Backplane Performance Driving Backplanes with High-Speed FPGA Transceivers

* R&D of advanced mixed signal design validation techniques and methodologies * R&D of advanced characterization methodologies for signal/power integrity on die, package, and board * Define laboratory equipment and best practices for next generation high-speed interfaces * Maintained peer relationships with industry experts in signal integrity * Worked closely with various teams for system engineering * Reviewed roadmaps for major metrology-grade equipment manufacturers to ensure cost-effective characterization solutions aligned with Nvidia's requirements * Expert in high-end engineering laboratory equipment and instrumentation

* Research and development of advanced characterization methodologies and simulations for high-speed (>25 Gb/s) transceivers with emphasis on signal conditioning techniques (FIR, CTLE, DFE, etc). * In-house expert on high-speed signal integrity, power integrity, and characterization methodologies specializing in jitter measurement, simulation, and analysis. * Advanced project management and supervision of an elite engineering team (typically 4-6 members) for mission-critical characterization and debug of high-speed transceivers. * Defined all transceiver characterization methodologies from 1Gb/s to 25 Gb/s for product engineering organization. * Defined transition of technical projects from R&D phase to product development phase, and ultimately to off-shore resources for cost reduction. * Worked closely with various engineering teams for product definition and development. * Reviewed roadmaps for major metrology-grade equipment manufacturers to ensure cost-effective characterization solutions aligned with future Altera products. * Maintained peer relationships with industry experts in signal integrity. The Relationship Between Variance of Time Measurements and the Autocorrelation Function Analyze FPGA Transceiver Interoperability and Signal Integrity

Supervisor: Dr. Mike Peng Li, Chief Technical Officer * Research and development of time-based jitter measurement systems. * Developed simulations of signal integrity in optical components. * Developed simulations and hardware for jitter-based phase noise measurements. * Presented numerous technical seminars on signal integrity based on jitter measurement and analysis. * Field experience in jitter measurements at many customer sites.

Supervisor: Dr. Simon Labov, Principle Investigator * Security clearance: U.S. Dept. of Energy "L" * Developed advanced high energy-resolution gamma-ray spectrometers based on active biased superconducting transition edge sensors with SQUID read-out. * Responsible for design, microfabrication, cryogenic testing, electronics, digital data acquisition, digital data analysis, and numerical modeling of detectors. * Achieved record energy resolution of 70 eV FWHM for 60 keV gamma-rays with >70% quantum efficiency and pixel area >1mm2. * Responsible for operation and maintenance of cryostats, UHV deposition systems, and photolithographic system in a class 1000 clean room environment.