sofi > sofi Employee Directory > Aarti S.
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Aarti S.
Senior Software Engineer
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Location: Sunnyvale, California, United StatesApprox. Years of Experience: 10
Aarti S.'s Current Workplace
SoFi
Company Size
2500+
Amount Raised
$4.1B
SoFi is a values-driven company on a mission to help our members get their money right. We create modern financial products and services that help people borrow, save, spend, invest, and protect their money better, so that they can achieve financial independence and realize their ambitions—from owning a home to saving for retirement, paying off their student loans, and more. \n\nCFL #6054612; NMLS #1121636 (www.nmlsconsumeraccess.org) Advisory services through SoFi LLC, a registered investment advisor. SoFi Checking and Savings is offered through SoFi Bank, N.A. Member FDIC. SoFi Money™ is offered through SoFi Securities LLC, member FINRA/SIPC.
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Notable Investors
SoftBank, Silver Lake, Morgan Stanley, QED Investors, BlackRock
FinTech
Banking
Credit Cards
Personal Finance
Consumer Lending
Wealth Management
Financial Services
Experience
SoFi
May 2021 - Present
Senior Software Engineer
Aug 2022 - Present
3 yrs
Senior software engineer for SoFi's personal finance management product, Relay. Experience leading highly ambiguous projects and working with cross-functional stakeholders to drive alignment and resolution. Skills: Problem Solving · Distributed Systems · Cloud Computing · Software Design · Leadership
Software Engineer
May 2021 - Aug 2022
1 yr 4 mos
- Software engineer on SoFi's Martech team. Built highly scalable backend systems and data pipelines for event instrumentation, user attribution and conversion tracking. - Lead the winning team for SoFi's spring 2022 hackathon - Ambassador for the Women's ERG and Co-lead for the Women In Tech group Skills: API Development · Kotlin · Python · Kubernetes · Apache Kafka · Apache Airflow
Analog Design Engineer
Texas Instruments
Aug 2017 - May 2021
3 yrs 10 mos
• Worked with system engineers and customers to define new product specifications • Designed circuit blocks, analog models and block level test-benches for power managements ICs • Wrote test plans to verify block-level functionality and performance across all corners and use cases • Performed post layout verification using LVS, QRC extraction & EM/IR analysis tools
Graduate Research Assistant
XCelerICs Inc.
Jan 2017 - May 2017
5 mos
• Researched speed optimization techniques for Successive Approximation Register (SAR) based ADCs. • Designed a 4 bit and an 8 bit 5GS/s high speed SAR ADC using Cadence and Spectre • Implemented system level models of 5th-order delta-sigma ADC and 2nd order delta-sigma ADC with dynamic element matching An 8b 5-GS/s CMOS SAR ADC with speed optimized SAR logic
Analog Design Intern
Texas Instruments
May 2016 - Aug 2016
4 mos
• Designed a boost converter for mobile backlight power applications on a new process technology • Performed analysis on expected area reduction using existing and new intellectual property blocks
Software Development Intern
Halliburton
Jun 2014 - Aug 2014
3 mos
• Developed improvements to multiple SCADA dashboard software applications using C in LabWindows • Incorporated new UI and back-end features into a dashboard application using Visual Basic .Net • Collected requirements for new features, working across multiple teams
SoFi
May 2021 - Present
Senior Software Engineer
Aug 2022 - Present
3 yrs
Senior software engineer for SoFi's personal finance management product, Relay. Experience leading highly ambiguous projects and working with cross-functional stakeholders to drive alignment and resolution.
Software Engineer
May 2021 - Aug 2022
1 yr 4 mos
- Software engineer on SoFi's Martech team. Built highly scalable backend systems and data pipelines for event instrumentation, user attribution and conversion tracking. - Lead the winning team for SoFi's spring 2022 hackathon - Ambassador for the Women's ERG and Co-lead for the Women In Tech group
Analog Design Engineer
Texas Instruments
Aug 2017 - May 2021
3 yrs 10 mos
• Worked with system engineers and customers to define new product specifications • Designed circuit blocks, analog models and block level test-benches for power managements ICs • Wrote test plans to verify block-level functionality and performance across all corners and use cases • Performed post layout verification using LVS, QRC extraction & EM/IR analysis tools
Graduate Research Assistant
XCelerICs Inc.
Jan 2017 - May 2017
5 mos
• Researched speed optimization techniques for Successive Approximation Register (SAR) based ADCs. • Designed a 4 bit and an 8 bit 5GS/s high speed SAR ADC using Cadence and Spectre • Implemented system level models of 5th-order delta-sigma ADC and 2nd order delta-sigma ADC with dynamic element matching An 8b 5-GS/s CMOS SAR ADC with speed optimized SAR logic
Analog Design Intern
Texas Instruments
May 2016 - Aug 2016
4 mos
• Designed a boost converter for mobile backlight power applications on a new process technology • Performed analysis on expected area reduction using existing and new intellectual property blocks
Software Development Intern
Halliburton
Jun 2014 - Aug 2014
3 mos
• Developed improvements to multiple SCADA dashboard software applications using C in LabWindows • Incorporated new UI and back-end features into a dashboard application using Visual Basic .Net • Collected requirements for new features, working across multiple teams
Education
  • 2015 - 2017
    University of Illinois Urbana-ChampaignMaster of Science (M.S.), Electrical and Computer Engineering
  • 2011 - 2015
    University of Illinois Urbana-ChampaignBachelor of Science (BS), Electrical Engineering
  • 2015 - 2017
    University of Illinois Urbana-ChampaignMaster of Science (M.S.), Electrical and Computer Engineering
  • 2011 - 2015
    University of Illinois Urbana-ChampaignBachelor of Science (BS), Electrical Engineering